He was born in New Barnet in England in 1950. He graduated from the University College of North Wales with a first class degree in Physics following which he completed at PhD researching into the physics of lateral transistors for integrated circuits.

He worked at Plessey Research, Caswell for 11 years on diverse projects including integrated injection logic and NMOS chip design. He also led a team designing circuits for fibre optics and was leader of an alvey collaborative project aimed at providing a fault tolerant design methodology for wafer scale integration.

He joined Anamartic as a design manager for bipolar wafer scale memory before joining SSSL in 1989.

Geoff is a Consultant Engineer on the Management Team and has a particular interest in the development and training of the engineering team at SSSL.